<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"><channel><title>Tiled Thoughts: A Verbose Debug Build</title><description>Compiler passes, ML systems, and the occasional detour. Long-form notes from the path between code and silicon.</description><link>https://samarthnarang.com/</link><language>en-us</language><item><title>MLIR for People Who Only Know LLVM IR: A Guided Tour</title><link>https://samarthnarang.com/tiled-thoughts/posts/mlir-for-llvm/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/mlir-for-llvm/</guid><description>A practical mental-model bridge from LLVM IR to MLIR.</description><pubDate>Sun, 22 Feb 2026 20:48:12 GMT</pubDate><category>MLIR</category><category>LLVM</category><category>Compilers</category><category>IR</category><category>Optimization</category><category>Codegen</category></item><item><title>Can I Beat Clang’s Auto-Vectorizer on Apple Silicon? A SAXPY Case Study</title><link>https://samarthnarang.com/tiled-thoughts/posts/vec-playground/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/vec-playground/</guid><description>Hand-written NEON intrinsics, loop unrolling, and a spoiler you can probably guess.</description><pubDate>Sat, 22 Nov 2025 20:48:43 GMT</pubDate><category>Compilers</category><category>LLVM</category><category>Apple-Silicon</category><category>Arm64</category><category>Vectorization</category><category>Neon</category></item><item><title>Quantization in MLIR: Types, Scales, and Where to Put the q</title><link>https://samarthnarang.com/tiled-thoughts/posts/quantization-in-mlir/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/quantization-in-mlir/</guid><description>Everyone agrees it matters; the details stay fuzzy. Here are the details.</description><pubDate>Tue, 18 Nov 2025 20:48:26 GMT</pubDate><category>MLIR</category><category>Quantization</category><category>Compilers</category><category>ML</category></item><item><title>How GPUs Talk: A Practical Guide to Multi-GPU Training and Communication</title><link>https://samarthnarang.com/tiled-thoughts/posts/multi-gpu-comm/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/multi-gpu-comm/</guid><description>Collectives, interconnects, and the communication patterns behind efficient distributed training.</description><pubDate>Sat, 15 Nov 2025 20:48:15 GMT</pubDate><category>Gpu</category><category>Distributed-Training</category><category>Systems</category></item><item><title>Data Structure and Iterator Kung Fu in LLVM</title><link>https://samarthnarang.com/tiled-thoughts/posts/llvm-ds-iter/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/llvm-ds-iter/</guid><description>Zero-copy views and safe mutation loops for faster LLVM passes.</description><pubDate>Sun, 09 Nov 2025 20:48:04 GMT</pubDate><category>LLVM</category><category>Data-Structures</category><category>Iterators</category><category>Compilers</category><category>Performance</category><category>C++</category></item><item><title>Demystifying GPU Terminology: A Compiler Engineer’s Field Guide</title><link>https://samarthnarang.com/tiled-thoughts/posts/demystifying-gpu-terminology/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/demystifying-gpu-terminology/</guid><description>SIMD, warps, occupancy, coalescing, shared memory, spills and matrix units — mapped to real compiler decisions.</description><pubDate>Sun, 09 Nov 2025 05:00:00 GMT</pubDate><category>Gpu</category><category>Performance</category><category>Compilers</category><category>MLIR</category><category>Triton</category><category>CUDA</category><category>ROCm</category></item><item><title>How Rewriting works in MLIR</title><link>https://samarthnarang.com/tiled-thoughts/posts/rewriting-mlir/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/rewriting-mlir/</guid><description>How MLIR&apos;s pattern rewriting works, and why it makes optimizations composable.</description><pubDate>Sat, 08 Nov 2025 20:48:31 GMT</pubDate><category>MLIR</category><category>Rewriting</category><category>Compilers</category><category>Optimization</category></item><item><title>Booting Up: A Verbose Debug Build of Life and Compilers</title><link>https://samarthnarang.com/tiled-thoughts/posts/verbose-debug-build/</link><guid isPermaLink="true">https://samarthnarang.com/tiled-thoughts/posts/verbose-debug-build/</guid><description>Compiler passes, ML systems, and life — debug logs from the path between code and silicon.</description><pubDate>Tue, 04 Nov 2025 20:48:49 GMT</pubDate><category>Reflection</category><category>Compilers</category><category>MLIR</category><category>LLVM</category><category>Triton</category></item></channel></rss>