Deep Learning Compiler Engineer · NVIDIA

• Formal methods of verification for MLIR-based deep learning compilers.
• …and agents.

• MLIR
• formal verification
• LLVM

Deep Learning Compiler Engineer · Qualcomm

• One of the core contributors to a new MLIR-based compiler stack for Qualcomm's AI inference on Hexagon NPUs — from prototyping through benchmarking of the Triton-based compilation path. Open sourced at qualcomm/hexagon-mlir.
• Extended a sequence of MLIR passes — multi-level tiling, fusion, vectorization, multithreading — culminating in lowering to LLVM for NPU backend codegen.
• Worked on the tiling algorithms used by Qualcomm's proprietary Hexagon NPU compiler for on-device AI inference.
• Handled critical performance issues hit by customers running LLMs on Qualcomm NSPs.

• MLIR
• Triton
• tiling
• fusion
• vectorization
• NPU

Machine Learning Engineer · DeGirum

ML compiler backend

• Built out an AI compiler for DeGirum's hardware accelerator, focused on performance and widening the set of models it could compile.
• Implemented SIMD parallelism, vector processing, and pipelining strategies to cut data movement and memory footprint.
• Extended the compiler to support LLMs, working through the details of transformer architectures.
• Benchmarked CPU cores on FPGA to decide what to offload during real-time model execution.

ML deployment infrastructure

• Compiled models with the DeGirum compiler and integrated them into the DeGirum ecosystem via a Flask API.
• Wrote the PyTest suites and CI/CD pipelines that automated deployment and testing.

• SIMD
• LLM support
• FPGA
• Flask
• CI/CD

Software Engineering Co-op · DeGirum

Machine learning team · Aug 2022 – May 2023

• Compiled PyTorch models onto company-specific compilers; handled FP32 → UInt8 quantization to widen model coverage.
• Ported 132 models (quantized and float) from the timm repository into DeGirum's model zoo.

Embedded software team · Feb 2022 – Aug 2022

• Built a UART interface monitor in RISC-V assembly as a field-engineer debug tool.
• Wrote ROM code routines for MBIST operations and redesigned the existing MBIST tests to finish 40% faster.
• Wrote embedded C tests for pre-silicon RTL validation and extended the Verilog test bench.

• PyTorch
• quantization
• RISC-V
• MBIST
• Verilog

M.S. Computer Science · UT Austin

• GPA 3.94. Coursework in compiler construction and implementation of programming languages, virtualization, NLP, reinforcement learning, generative AI, and optimization.

B.S. Computer Science & Mathematics · UMass Amherst

• GPA 3.98 — Summa Cum Laude, Dean's List every semester, Chancellor's Scholarship ($16,000/yr).
• Coursework in operating systems, networking, computer systems, algorithms and data structures, machine learning, and regression analysis.